[반도체 공정] High-k 물질

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레포트 > 공학계열
2010.04.26
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[반도체 공정] High-k 물질에 대한 자료입니다.

Introduction

What is ‘high-k’?

Applications

Summary

본문내용

From an electrical standpoint, the MOS structure is equivalent to a parallel plate capacitor. When a voltage is applied between the gate and source terminals, the resulting electric field penetrates through the oxide, creating a so-called "inversion channel" within the channel underneath. The inversion channel is of the same type — P-type or N-type — as the source and drain of the transistor, providing a conduit through which current can pass. Ignoring quantum mechanical and depletion effects from the Si substrate and gate, the capacitance C of this parallel plate capacitor is given by

Where
A is the capacitor area
κ is the relative dielectric constant of the material (3.9 for silicon dioxide)
ε0 is the permittivity of free space

decreasing the thickness t -> increase the capacitance of the structure

increase the number of charges in the channel and the drive current for a
fixed value of gate voltage.

the silicon dioxide layer thickness is reaching the limits of scaling.

The alternative way of increasing capacitance is to use an insulator with
a higher dielectric constant than silicon dioxide.

In such a scenario, a thicker gate layer might be used which can reduce the leakage current flowing through the structure as well as improving the gate dielectric reliability.

The drive current ID for a MOSFET can be written
(using the gradual channel approximation) as

Where
W : width of the transistor channel
L : channel length
μ : channel carrier mobility (assumed constant here)
Cinv : capacitance density associated with the gate dielectric when the underlying channel is in the inverted state
VG : voltage applied to the transistor gate
VD : voltage applied to the transistor drain
VT : threshold voltage

Permittivity
Band gap
Band alignment to silicon - sufficiently large band offsets are needed to keep the leakage current low and protect the film from hot carrier injection.
Thermodynamic stability
Minimization of electric fields due to phonons in the dielectric to reduce scattering in the Si substrate so as to achieve high mobility of charge carriers in the MOSFET channel
Minimization of the concentration of electrically charged and/or electrically active defects in the film
Film morphology - Amorphous or epitaxial films seem to be the promising candidates - polycrystalline materials are generally ruled out.
Interface quality
Compatibility with the current or expected materials to be used in processing for CMOS devices
Process compatibility - for one, the film must survive sufficiently high temperatures such as a Rapid thermal anneal to 1000 °C for say, 10 s (as dictated by the CMOS technological process)
Reliability
Stability against degradation by the electric field and injected carriers.
Precursor availability
Precursor and process costs

참고문헌

Defects in High-k Gate Dielectric Stacks (Paperback) Gusev, Evgeni (EDT)| Springer Verlag| 2007.03.02 | 492p
High-k 유전박막 MIS(Metal-Insulator-Semiconductor) 커패시터의 플라즈마 Etching Damage에 대한 연구, 저자:양승국, 인천 : 인하대 대학원, 200402
A good review article can be found at - High-kappa gate dielectrics: Current status and materials properties considerations by Wilk G.D., Wallace R.M., Anthony J.M.; (J. App. Phys. 89 (10): 5243-5275 2001)
Houssa, M. (Ed.) (2003) High-κ Dielectrics Institute of Physics ISBN 0-7503-0906-7
Huff, H.R., Gilmer, D.C. (Ed.) (2005) High Dielectric Constant Materials : VLSI MOSFET applications Springer ISBN 3-540-21081-4
Demkov, A.A, Navrotsky, A., (Ed.) (2005) Materials Fundamentals of Gate Dielectrics Springer ISBN 1-4020-3077-0
"High dielectric constant gate oxides for metal oxide Si transistors" Robertson, J. (Rep. Prog. Phys. 69 327-396 2006) Institute Physics Publishing

#the #to #of #in #is #gate #and #for #channel #Highk

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