To prevent silicon from agglomerating
→ should cool the solid quickly
Rapid cooling
→ large thermal gradient incrystal
Postulate K=20W/m K
Diameter of wafer: 10-20 cm
L (latent heat of fusion) = 340 cal/g
Temperature gradient insilicon CZ (dT/dx) : 100°C/cm
The only different between passive and active solid-state cooling isthe utilization of a thermoelectric module (TEM) sandwiched between the processor andthe passive or active heat sink.
• Thermal Design Power(TDP) is method of cooling for chip, but it
reflects the uneven power distribution, and also may result in over
Cooling of large areas, leading to excessive package cost.
the samples. Fig. 1 (a) isthe typical XRD pattern of ZnO films with a preferred C axis orientation of (002) which has a full width at half maximum (FWHM) of 0.3°. The XRD pattern of sample (b) also shows the high C axis oriented ZnO grains with FWHM of 0.5°, which suggests that thecrystallization of ZnO turns worse. Meanwhile, other three additional peaks attributed to Zn2GeO4 are observed in
The ability to tailor the chemical composition and structure of a
surface on the 1–100 nm length scale is important to researchers
studying topics ranging from electronic conduction, to catalysis, to
biological recognition in nanoscale systems.
While microfabrication techniques such as photolithography, microcontact
printing, micromachining, and microwriting can pro
the ZnO nanowire growth was governed by a VLS process. Fig. 1(a) shows ZnO nanowires obtained under the same condition as the ones in Fig. 1(a). But as they were grown inthe margin, the size were much larger andthe catalyst particles cannot be seen clearly at the tips ofthe nanowires under the resolving capability ofthe SEM. The VLS growth mechanism is identical tothe published papers (Huang